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authorAbseil Team <absl-team@google.com>2019-06-21T20·11-0700
committerGennadiy Rozental <rogeeff@google.com>2019-06-21T20·18-0400
commite9324d926a9189e222741fce6e676f0944661a72 (patch)
treea08568a709940c376454da34c9d8aac021378e5f /absl/random/internal/randen_detect.cc
parent43ef2148c0936ebf7cb4be6b19927a9d9d145b8f (diff)
Export of internal Abseil changes.
--
7a6ff16a85beb730c172d5d25cf1b5e1be885c56 by Laramie Leavitt <lar@google.com>:

Internal change.

PiperOrigin-RevId: 254454546

--
ff8f9bafaefc26d451f576ea4a06d150aed63f6f by Andy Soffer <asoffer@google.com>:

Internal changes

PiperOrigin-RevId: 254451562

--
deefc5b651b479ce36f0b4ef203e119c0c8936f2 by CJ Johnson <johnsoncj@google.com>:

Account for subtracting unsigned values from the size of InlinedVector

PiperOrigin-RevId: 254450625

--
3c677316a27bcadc17e41957c809ca472d5fef14 by Andy Soffer <asoffer@google.com>:

Add C++17's std::make_from_tuple to absl/utility/utility.h

PiperOrigin-RevId: 254411573

--
4ee3536a918830eeec402a28fc31a62c7c90b940 by CJ Johnson <johnsoncj@google.com>:

Adds benchmark for the rest of the InlinedVector public API

PiperOrigin-RevId: 254408378

--
e5a21a00700ee83498ff1efbf649169756463ee4 by CJ Johnson <johnsoncj@google.com>:

Updates the definition of InlinedVector::shrink_to_fit() to be exception safe and adds exception safety tests for it.

PiperOrigin-RevId: 254401387

--
2ea82e72b86d82d78b4e4712a63a55981b53c64b by Laramie Leavitt <lar@google.com>:

Use absl::InsecureBitGen in place of std::mt19937
in tests absl/random/...distribution_test.cc

PiperOrigin-RevId: 254289444

--
fa099e02c413a7ffda732415e8105cad26a90337 by Andy Soffer <asoffer@google.com>:

Internal changes

PiperOrigin-RevId: 254286334

--
ce34b7f36933b30cfa35b9c9a5697a792b5666e4 by Andy Soffer <asoffer@google.com>:

Internal changes

PiperOrigin-RevId: 254273059

--
6f9c473da7c2090c2e85a37c5f00622e8a912a89 by Jorg Brown <jorg@google.com>:

Change absl::container_internal::CompressedTuple to instantiate its
internal Storage class with the name of the type it's holding, rather
than the name of the Tuple.  This is not an externally-visible change,
other than less compiler memory is used and less debug information is
generated.

PiperOrigin-RevId: 254269285

--
8bd3c186bf2fc0c55d8a2dd6f28a5327502c9fba by Andy Soffer <asoffer@google.com>:

Adding short-hand IntervalClosed for IntervalClosedClosed and IntervalOpen for
IntervalOpenOpen.

PiperOrigin-RevId: 254252419

--
ea957f99b6a04fccd42aa05605605f3b44b1ecfd by Abseil Team <absl-team@google.com>:

Do not directly use __SIZEOF_INT128__.

In order to avoid linker errors when building with clang-cl (__fixunsdfti, __udivti3 and __fixunssfti are undefined), this CL uses ABSL_HAVE_INTRINSIC_INT128 which is not defined for clang-cl.

PiperOrigin-RevId: 254250739

--
89ab385cd26b34d64130bce856253aaba96d2345 by Andy Soffer <asoffer@google.com>:

Internal changes

PiperOrigin-RevId: 254242321

--
cffc793d93eca6d6bdf7de733847b6ab4a255ae9 by CJ Johnson <johnsoncj@google.com>:

Adds benchmark for InlinedVector::reserve(size_type)

PiperOrigin-RevId: 254199226

--
c90c7a9fa3c8f0c9d5114036979548b055ea2f2a by Gennadiy Rozental <rogeeff@google.com>:

Import of CCTZ from GitHub.

PiperOrigin-RevId: 254072387

--
c4c388beae016c9570ab54ffa1d52660e4a85b7b by Laramie Leavitt <lar@google.com>:

Internal cleanup.

PiperOrigin-RevId: 254062381

--
d3c992e221cc74e5372d0c8fa410170b6a43c062 by Tom Manshreck <shreck@google.com>:

Update distributions.h to Abseil standards

PiperOrigin-RevId: 254054946

--
d15ad0035c34ef11b14fadc5a4a2d3ec415f5518 by CJ Johnson <johnsoncj@google.com>:

Removes functions with only one caller from the implementation details of InlinedVector by manually inlining the definitions

PiperOrigin-RevId: 254005427

--
2f37e807efc3a8ef1f4b539bdd379917d4151520 by Andy Soffer <asoffer@google.com>:

Initial release of Abseil Random

PiperOrigin-RevId: 253999861

--
24ed1694b6430791d781ed533a8f8ccf6cac5856 by CJ Johnson <johnsoncj@google.com>:

Updates the definition of InlinedVector::assign(...)/InlinedVector::operator=(...) to new, exception-safe implementations with exception safety tests to boot

PiperOrigin-RevId: 253993691

--
5613d95f5a7e34a535cfaeadce801441e990843e by CJ Johnson <johnsoncj@google.com>:

Adds benchmarks for InlinedVector::shrink_to_fit()

PiperOrigin-RevId: 253989647

--
2a96ddfdac40bbb8cb6a7f1aeab90917067c6e63 by Abseil Team <absl-team@google.com>:

Initial release of Abseil Random

PiperOrigin-RevId: 253927497

--
bf1aff8fc9ffa921ad74643e9525ecf25b0d8dc1 by Andy Soffer <asoffer@google.com>:

Initial release of Abseil Random

PiperOrigin-RevId: 253920512

--
bfc03f4a3dcda3cf3a4b84bdb84cda24e3394f41 by Laramie Leavitt <lar@google.com>:

Internal change.

PiperOrigin-RevId: 253886486

--
05036cfcc078ca7c5f581a00dfb0daed568cbb69 by Eric Fiselier <ericwf@google.com>:

Don't include `winsock2.h` because it drags in `windows.h` and friends,
and they define awful macros like OPAQUE, ERROR, and more. This has the
potential to break abseil users.

Instead we only forward declare `timeval` and require Windows users
include `winsock2.h` themselves. This is both inconsistent and poor QoI, but so
including 'windows.h' is bad too.

PiperOrigin-RevId: 253852615
GitOrigin-RevId: 7a6ff16a85beb730c172d5d25cf1b5e1be885c56
Change-Id: Icd6aff87da26f29ec8915da856f051129987cef6
Diffstat (limited to 'absl/random/internal/randen_detect.cc')
-rw-r--r--absl/random/internal/randen_detect.cc219
1 files changed, 219 insertions, 0 deletions
diff --git a/absl/random/internal/randen_detect.cc b/absl/random/internal/randen_detect.cc
new file mode 100644
index 000000000000..d5946b219cc2
--- /dev/null
+++ b/absl/random/internal/randen_detect.cc
@@ -0,0 +1,219 @@
+// Copyright 2017 The Abseil Authors.
+//
+// Licensed under the Apache License, Version 2.0 (the"License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//      https://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an"AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+// HERMETIC NOTE: The randen_hwaes target must not introduce duplicate
+// symbols from arbitrary system and other headers, since it may be built
+// with different flags from other targets, using different levels of
+// optimization, potentially introducing ODR violations.
+
+#include "absl/random/internal/randen_detect.h"
+
+#include <cstdint>
+#include <cstring>
+
+#include "absl/random/internal/platform.h"
+
+#if defined(ABSL_ARCH_X86_64)
+#define ABSL_INTERNAL_USE_X86_CPUID
+#elif defined(ABSL_ARCH_PPC) || defined(ABSL_ARCH_ARM) || \
+    defined(ABSL_ARCH_AARCH64)
+#if defined(__ANDROID__)
+#define ABSL_INTERNAL_USE_ANDROID_GETAUXVAL
+#define ABSL_INTERNAL_USE_GETAUXVAL
+#elif defined(__linux__)
+#define ABSL_INTERNAL_USE_LINUX_GETAUXVAL
+#define ABSL_INTERNAL_USE_GETAUXVAL
+#endif
+#endif
+
+#if defined(ABSL_INTERNAL_USE_X86_CPUID)
+#if defined(_WIN32) || defined(_WIN64)
+#include <intrin.h>  // NOLINT(build/include_order)
+#pragma intrinsic(__cpuid)
+#else
+// MSVC-equivalent __cpuid intrinsic function.
+static void __cpuid(int cpu_info[4], int info_type) {
+  __asm__ volatile("cpuid \n\t"
+                   : "=a"(cpu_info[0]), "=b"(cpu_info[1]), "=c"(cpu_info[2]),
+                     "=d"(cpu_info[3])
+                   : "a"(info_type), "c"(0));
+}
+#endif
+#endif  // ABSL_INTERNAL_USE_X86_CPUID
+
+// On linux, just use the c-library getauxval call.
+#if defined(ABSL_INTERNAL_USE_LINUX_GETAUXVAL)
+
+extern "C" unsigned long getauxval(unsigned long type);  // NOLINT(runtime/int)
+
+static uint32_t GetAuxval(uint32_t hwcap_type) {
+  return static_cast<uint32_t>(getauxval(hwcap_type));
+}
+
+#endif
+
+// On android, probe the system's C library for getauxval().
+// This is the same technique used by the android NDK cpu features library
+// as well as the google open-source cpu_features library.
+//
+// TODO(absl-team): Consider implementing a fallback of directly reading
+// /proc/self/auxval.
+#if defined(ABSL_INTERNAL_USE_ANDROID_GETAUXVAL)
+#include <dlfcn.h>
+
+static uint32_t GetAuxval(uint32_t hwcap_type) {
+  // NOLINTNEXTLINE(runtime/int)
+  typedef unsigned long (*getauxval_func_t)(unsigned long);
+
+  dlerror();  // Cleaning error state before calling dlopen.
+  void* libc_handle = dlopen("libc.so", RTLD_NOW);
+  if (!libc_handle) {
+    return 0;
+  }
+  uint32_t result = 0;
+  void* sym = dlsym(libc_handle, "getauxval");
+  if (sym) {
+    getauxval_func_t func;
+    memcpy(&func, &sym, sizeof(func));
+    result = static_cast<uint32_t>((*func)(hwcap_type));
+  }
+  dlclose(libc_handle);
+  return result;
+}
+
+#endif
+
+namespace absl {
+namespace random_internal {
+
+// The default return at the end of the function might be unreachable depending
+// on the configuration. Ignore that warning.
+#if defined(__clang__)
+#pragma clang diagnostic push
+#pragma clang diagnostic ignored "-Wunreachable-code-return"
+#endif
+
+// CPUSupportsRandenHwAes returns whether the CPU is a microarchitecture
+// which supports the crpyto/aes instructions or extensions necessary to use the
+// accelerated RandenHwAes implementation.
+//
+// 1. For x86 it is sufficient to use the CPUID instruction to detect whether
+//    the cpu supports AES instructions. Done.
+//
+// Fon non-x86 it is much more complicated.
+//
+// 2. When ABSL_INTERNAL_USE_GETAUXVAL is defined, use getauxval() (either
+//    the direct c-library version, or the android probing version which loads
+//    libc), and read the hardware capability bits.
+//    This is based on the technique used by boringssl uses to detect
+//    cpu capabilities, and should allow us to enable crypto in the android
+//    builds where it is supported.
+//
+// 3. Use the default for the compiler architecture.
+//
+
+bool CPUSupportsRandenHwAes() {
+#if defined(ABSL_INTERNAL_USE_X86_CPUID)
+  // 1. For x86: Use CPUID to detect the required AES instruction set.
+  int regs[4];
+  __cpuid(reinterpret_cast<int*>(regs), 1);
+  return regs[2] & (1 << 25);  // AES
+
+#elif defined(ABSL_INTERNAL_USE_GETAUXVAL)
+  // 2. Use getauxval() to read the hardware bits and determine
+  // cpu capabilities.
+
+#define AT_HWCAP 16
+#define AT_HWCAP2 26
+#if defined(ABSL_ARCH_PPC)
+  // For Power / PPC: Expect that the cpu supports VCRYPTO
+  // See https://members.openpowerfoundation.org/document/dl/576
+  // VCRYPTO should be present in POWER8 >= 2.07.
+  // Uses Linux kernel constants from arch/powerpc/include/uapi/asm/cputable.h
+  static const uint32_t kVCRYPTO = 0x02000000;
+  const uint32_t hwcap = GetAuxval(AT_HWCAP2);
+  return (hwcap & kVCRYPTO) != 0;
+
+#elif defined(ABSL_ARCH_ARM)
+  // For ARM: Require crypto+neon
+  // http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.ddi0500f/CIHBIBBA.html
+  // Uses Linux kernel constants from arch/arm64/include/asm/hwcap.h
+  static const uint32_t kNEON = 1 << 12;
+  uint32_t hwcap = GetAuxval(AT_HWCAP);
+  if ((hwcap & kNEON) == 0) {
+    return false;
+  }
+
+  // And use it again to detect AES.
+  static const uint32_t kAES = 1 << 0;
+  const uint32_t hwcap2 = GetAuxval(AT_HWCAP2);
+  return (hwcap2 & kAES) != 0;
+
+#elif defined(ABSL_ARCH_AARCH64)
+  // For AARCH64: Require crypto+neon
+  // http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.ddi0500f/CIHBIBBA.html
+  static const uint32_t kNEON = 1 << 1;
+  static const uint32_t kAES = 1 << 3;
+  const uint32_t hwcap = GetAuxval(AT_HWCAP);
+  return ((hwcap & kNEON) != 0) && ((hwcap & kAES) != 0);
+#endif
+
+#else  // ABSL_INTERNAL_USE_GETAUXVAL
+  // 3. By default, assume that the compiler default.
+  return ABSL_HAVE_ACCELERATED_AES ? true : false;
+
+#endif
+  // NOTE: There are some other techniques that may be worth trying:
+  //
+  // * Use an environment variable: ABSL_RANDOM_USE_HWAES
+  //
+  // * Rely on compiler-generated target-based dispatch.
+  // Using x86/gcc it might look something like this:
+  //
+  // int __attribute__((target("aes"))) HasAes() { return 1; }
+  // int __attribute__((target("default"))) HasAes() { return 0; }
+  //
+  // This does not work on all architecture/compiler combinations.
+  //
+  // * On Linux consider reading /proc/cpuinfo and/or /proc/self/auxv.
+  // These files have lines which are easy to parse; for ARM/AARCH64 it is quite
+  // easy to find the Features: line and extract aes / neon. Likewise for
+  // PPC.
+  //
+  // * Fork a process and test for SIGILL:
+  //
+  // * Many architectures have instructions to read the ISA. Unfortunately
+  //   most of those require that the code is running in ring 0 /
+  //   protected-mode.
+  //
+  //   There are several examples. e.g. Valgrind detects PPC ISA 2.07:
+  //   https://github.com/lu-zero/valgrind/blob/master/none/tests/ppc64/test_isa_2_07_part1.c
+  //
+  //   MRS <Xt>, ID_AA64ISAR0_EL1 ; Read ID_AA64ISAR0_EL1 into Xt
+  //
+  //   uint64_t val;
+  //   __asm __volatile("mrs %0, id_aa64isar0_el1" :"=&r" (val));
+  //
+  // * Use a CPUID-style heuristic database.
+  //
+  // * On Apple (__APPLE__), AES is available on Arm v8.
+  //   https://stackoverflow.com/questions/45637888/how-to-determine-armv8-features-at-runtime-on-ios
+}
+
+#if defined(__clang__)
+#pragma clang diagnostic pop
+#endif
+
+}  // namespace random_internal
+}  // namespace absl